1. Field of the Invention
The present invention relates to a general purpose register circuit that stores and outputs desired data.
2. Background Art
Data memories include readable and writable memories dedicated to data storage, which are to be provided independently of program memories.
The data memories are generally classified into the following two types, both of which are readable and writable.
One type is a special function register (SFR) that stores data for specifying functions and operations of the central processing unit (CPU) and peripheral devices.
The other is a general purpose register (GPR) that serves as a general purpose data area and is used as a variable data area or a buffer.
When a circuit, such as a microprocessor, that has such a conventional general purpose register uses a particular value, the circuit first reads a value from the general purpose register circuit to create the particular value. Then, a computing unit processes the value by a calculation. Then, the result of the computational processing is written to the general purpose register circuit. Then, the circuit reads the written value for use. The circuit may use the value before the value is written to the general purpose register circuit.
However, as described above, in order to obtain a desired output from the general purpose register circuit, the value read from the general purpose register circuit has to be processed by performing a calculation, and therefore, there is a problem that it is difficult to increase the signal output rate to a desired level.
A conventional register has a multiplexer, a D-type flip flop that receives the output of the multiplexer at the D terminal thereof, and an AND gate that outputs a signal for selecting the output of the multiplexer based on a signal for selecting a register circuit to be modified and a signal for selecting the output of the multiplexer. The multiplexer receives the output signal of the D-type flip flop and a signal that defines the final state of the register circuit.
With such a configuration, when states of a plurality of registers have to be modified, a single command can be written to modify the status of multiple bits. In this way, when the status of a plurality of register circuits has to be modified, the software overhead is reduced (see Japanese Patent Laid-Open Publication No. 7-210382, for example).
However, even the conventional register described above still has to process the value read from the D-type flip flop by a calculation in order to provide a desired output. Thus, it is difficult to increase the signal output rate to a desired level.